Abstracts
10-gigabit Channel Virtual Design Kit
Suresh Subramaniam, Xilinx Inc.; Lisa Murphy, Ansoft Corporation
Xilinx and Ansoft have developed methods and guidelines for modeling 10Gbps interconnect on printed circuit boards (PCBs) and backplanes that utilize Xilinx Virtex-II Pro X® FPGAs. Electrical models for the Xilinx Virtex-II Pro X® IC package, microstrip and stripline transmission lines, connectors, and vias have been created using electromagnetic simulation. Full channel response was computed using Ansoft Nexxim(tm) circuit simulation and system-level simulators. Models associated with this effort have been assembled into a 10Gbps backplane design kit that is available on the Xilinx "SI Central" Web site, enabling Xilinx customers to rapidly evaluate their board designs. This paper details the results of the Xilinx-Ansoft collaboration and will provide an overview of the 10Gbps design kit. Readers will learn how to use the design kit for electromagnetic-field simulation coupled with circuit and system simulation to predict performance of their circuit-board designs. Details on the methods for generating frequency- and time-domain results, such as high-frequency insertion loss, TDR impedance plots, eye diagrams, and channel-to-channel crosstalk are given. The full channel simulations result in the insertion and return loss profiles as a function of frequency. Readers will learn how to set parameters for output voltage swing, pre-emphasis, and equalization within the FPGA to overcome the predicted channel distortions.
Characterizing and Modeling the Impact of Power/Ground Via Arrays on Power Plane Impedance
Jason R. Miller and Istvan Novak, Sun Microsystems; Jim Delap, Ansoft Corporation
In this paper, the impact of power/ground via arrays on power-plane impedance is studied. 8 x 8 via array structures are characterized, and the results are compared to full-wave field simulation using HFSS™. These results show that the impedance and effective inductance is a strong function of location within the array. The lowest impedance is found on the array perimeter, and the impedance is several times higher in the array center. The impact antipad size and dielectric thickness on the plane impedance and inductance is examined using parameterized models.
An Advanced Methodology for On-chip Passive Component Design and Optimization
Albert Yen, UMC Corporation; Steve Rousselle and Bryan Boots, Ansoft Corporation
An advanced, electromagnetics-based design procedure for on-chip spiral inductor design is discussed. This Electromagnetic Design Methodology (EMDM) uses full-wave 3D simulation to compute the inductance and quality factor (Q) of spiral inductors with accuracy traceable to the foundry process. This paper highlights utilization of high-speed circuit simulation to optimize spirals while simultaneously employing the accuracy of a full-wave, 3D field solver. A methodology to back annotate the optimized design to common layout tools is demonstrated, and measured versus simulated data is provided to validate the procedures.
Ultra-wideband Radio Design for Multiband OFDM 480 Mb/s Wireless USB
Albert Yen, UMC Corporation; Lawrence Williams, Daniel Wu, Eldon Staggs, Ansoft Corporation
The Multiband OFDM Alliance (MBOA) has issued an ultra-wideband (UWB) radio specification that may be applied to 480 Mb/s wireless USB applications. Design and simulation of a direct-conversion radio architecture in support of this MBOA proposal is detailed. Details on system design requirements and circuit implementation based on the UMC 0.13 um CMOS process are presented. Radio transmitter and receiver design is covered with emphasis on the I/Q modulator and demodulator, synthesizer, T/R switch, low-noise amplifier, and transmit power amplifier.
