First-Pass System Success

ABSTRACTS

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High-Performance Signal Integrity, Power Integrity and EMI
High-Performance RF and Microwave Design
High-Performance IC and Advanced Packaging Design
High-Performance Electromechanical and Power Systems

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HIGH-PERFORMANCE SIGNAL INTEGRITY, POWER INTEGRITY AND EMI

A Modular Platform for Accurate Multi-gigabit Serial Channel Validation
Partner Companies: Tektronix, Efficere

Implementing multi-gigabit serial designs requires accurate and efficient methodologies to meet performance and time-to-market goals. New technologies standards like TMDS, PCIe gen2 and Hypertransport 3 require accurate models to account for the frequency dependant layout effects throughout the entire interconnect path. In addition, these technologies employ increasingly sophisticated pre-emphasis and equalization circuitry to optimize system performance and compensate for signal degradation in the channel. To meet these challenges, designers must adopt new, modular platforms that combine 3D EM modeling, measurement, and sophisticated circuit and simulation to produce valuable gains in procedural efficiency while maintaining the required high levels of accuracy.

The author will validate this new platform by comparing measurement and simulation for several multi-gigabit serial channels. The author will first decompose a 10 gigabit Tektronix reference design board into its constituent parts, run simulation, and highlight the most effective procedures to compare simulation and measurement in both time and frequency domains. A design kit with EM based parameterized models for Tektronix probes, sockets, and test fixtures will be shown along with the Tek’s unique Iconnect technology. Next, the author will add active circuitry for pre-emphasis, equalization, and transistor level models for the drivers and receivers to a Maxim designed multi-gigabit speed serial channel. Simulation and measurement will be performed to validate the platforms ability to predict for multi-gigabit designs that include non-linear active devices and frequency dependant effects from connectors, vias, transmission structures, and other critical PCB interconnects.
http://www.tek.com
http://www.efficere.com

A Modular Platform for Rapid Optimization of Multi-gigabit Serial Channels
Partner Company: Hewlett Packard

Although accurately predicting the performance of a multi-gigabit serial channels including the physical layout effects together with transistor-level circuitry is impressive, today’s engineers demand more. Not only are today’s engineers expected to get new products to market first, they are expected to produce market-winning designs with sustainable technology advantages that can withstand the pressures of global competition. Hence, today’s leading engineers are adopting solutions that couple modern automation with advanced precision running on advanced compute systems with massive compute power. Leading designers recognize they can no longer trade speed for accuracy, and/or accuracy for capacity if they are to create winning technologies with profitable lifecycles. Winning teams realize their design methodologies must concurrently be fast, accurate and able to solve increasingly larger, more complex designs.

This presentation will highlight the simulation and optimization of a multi-gigabit path that starts in the IC on one daughter card and ends in another IC on a separate daughter card. The simulation will include all of the physical effects of the backplane, cabling, connectors, packaging, and PCB interconnect, transistor-level and system-level driver/receivers, and EMI radiation between boards and the chasis of the system. A design kit with pre-solved parameterized HFSS models for common PCB structures (bends, vias, meander lines, stripline, microstip, etc.) and critical 3D components (sockets, connectors, vias, transitions, relays, pogo pins) and cabling will be created and shown. The pre-solved models will include material and process variation parameters, such as non-rectangular conductors, PCB stackup, solder joint thickness, and impedance discontinuities. The design kit also will include commonly used encoding bit schemes for SATA, DDR, PCI GenII, and Hypertransport.

The kits shown will be made “design ready” in that they’ll include a library of pre-solved parameterized HFSS models and will be made available to all attendees. The design methodology shown is generalized to fit across the boundaries of design groups and/or companies in a robust and efficient manner.
http://www.hp.com

Achieving Optimized Power Delivery using Adaptive Target Impedance
Partner Company: Wistron Corporation

Power Delivery System (PDS) design has become an increasingly critical issue in the design of high-performance electronics. Design teams are being asked to add robust, new functionality while reducing the supply voltage and overall power consumption. To make matters worse, the impedance of adjacent power and ground planes create voltage drops across the power delivery network, causing conductors to radiate electric fields. These increased emissions often go unnoticed until prototypes are built and EMI tests uncover failures that cause costly re-designs and missed product launches.

To meet these challenges, engineers at Wistron Corporation have developed a new approach that optimizes the PDS design while significantly reducing the number of decoupling capacitors required. In addition to reducing cost, the new method also accounts for EMI issues concurrently. This allows PCB designers to assess trade-offs in the PDS system that directly impact downstream EMI issues in the design. The author will compare traditional methods that assume constant current with the adaptive target impedance approach that utilizes a realistic current demand time domain waveform. The complete design flow will be shown, step by step, as well as the improved performance and cost savings resulting from this new methodology.
http://www.wistron.com

Utilizing LVDS to Reduce EMI/EMC in Network Cameras
Partner Company: Panasonic Electronic Devices Co., Ltd.

Panasonic Communication Corporation’s Internet-enabled video cameras are a response to a heightened need for home and business security monitoring, the promise of telecommuting, and the desire to be closer to one’s customers. The network camera offers high-resolution images along with several new features, including motion sensors and timers to control recording, multiple camera views in a single graphical user interface (GUI), and manual zoom and angle control.

In this presentation, the authors present a new EM-Centric design methodology used to minimize common mode noise in differential traces to prevent potential electromagnetic compatibility issues and interference (EMC/EMI) effects. Panasonic’s use of Low Voltage Differential Signaling (LVDS) will be shown and discussed. Specific focus on reducing common mode noise to prevent EMC/EMI problems and new algorithms such as QuickEye/VerifEye to rapidly estimate system performance will be shown. The presentation concludes with strategies for optimizing LVDS trace designs and compares the performance of initial systems with completed designs using Panasonic’s new EM-Centric design process.
http://www.panasonic.com

EM-Circuit Co-design for High-Speed Memory Applications

In the design of high-speed memory applications that operate at data rates of 1.6Gbps and above, designers are increasingly confronted with jitter noise in their eye diagrams, significant reflections highlighted in TDR plots and simultaneous switching noise (SSN) problems, illustrated in Vdc power voltage plots. Very often, these results are obtained at the end of the design cycle, after all of the critical elements of the high-speed channel are put together and tested. Critical time-to-market windows are missed, the stress on the design teams increase exponentially, and valuable revenue is lost.

Today, leading companies are utilizing simulation in more sophisticated ways to accurately predict the performances of the high-speed memory interface between chip to chip and coupling from the power delivery system. Although comprehensive microwave, electromagnetic, and transmission line modeling is required, solutions that streamline the process and simplify the task for the engineers are now available. In this presentation, an EM-circuit co-design solution for high-speed memory applications will be presented and demonstrated. Accurate PCB EM models that include plane, trace, via, pad and stub effects are simulated together with critical 3D passive interconnects and active circuit models. Eye diagrams with jitter, impedance plots of PDN, and TDR plots are automatically generated from a custom script. Interested parties can discuss the details of the scripts used and learn the techniques to obtain accurate results from a limited amount of compute resources and time.

Full Vehicle Electromagnetic EMI/EMC

With the introduction of hybrid power train technologies and their significantly higher voltages and currents, electromagnetic compatibility (EMC) for automobiles has become a critical area of study. Failure to satisfy compatibility requirements causes significant increases in cost and design cycle time as designers work to diagnose and resolve issues. The increases are even greater when the majority of the design and testing process is based on prototypes. Although using simulation for full vehicle EMI/EMC studies has been limited because of prior limitations in algorithms and available computate hardware, recent improvements in 3D EM algorithms combined with today’s 64-bit compute architectures have put simulating such complex and electrically large simulations within reach of the designer.

This presentation will discuss examples of where 3D finite element (FEM) electromagnetic solvers can be applied to a set of problems in the area of full vehicle EMC. Simple examples will be studied to demonstrate the validity of the solution and matched with measured results from studies done at the University of Missouri, Rolla. The approach will then be extended to more complex vehicle models. The author will demonstrate the techniques used to build various, larger, more complex car models from 3D CAD browser database. Simulations including wire harness geometries will be shown along with new post-processing techniques that allow for using a pseudo random bit sequence source. The presentation will showcase standard emission test data from simulation of very large vehicle models and also provide attendees with vehicle models in HFSS™ for engineers interested in running their own simulations.

HIGH-PERFORMANCE RF AND MICROWAVE DESIGN

Designing Electronic Systems and Vehicles to Survive Lightning and EMP Effects

Designing systems to survive lightning and electromagnetic pulse (EMP) effects is a topic of growing concern for engineers creating next-generation electronics and vehicles. This presentation will study the induced electromagnetic fields from lightning strikes and other high-energy pulses on electronic vehicles and systems.

First, the author will decompose the high-energy pulses into the appropriate frequency components. The field solutions at these frequencies are solved, evaluated, and shown. Next, the authors demonstrate how to employ simulation to optimally design antennas on vehicle to maximize communication and decrease coupling problems. An interesting idea that proposes the use of antenna technology and absorbing materials specifically designed to mitigate lightning and EMP effects will be demonstrated. Lastly, the authors will illustrate new methodologies and tools to simulate the effects of induced electromagnetic fields on electronic printed circuit boards in vehicles. Coupling from lightning strikes and EMP events into in-vehicle printed circuit boards will be shown, and design techniques that enable engineers to first evaluate and then minimize coupling problems will be demonstrated.

Complex Antenna System Design

This presentation details the design of a wideband phased array radar antenna system following a process that includes radiating element design, element feed optimization, finite-sized array pattern prediction and optimization, radar cross section (RCS), and platform installed performance.

First, a flared notch radiator (Vivaldi) antenna element is optimized in a broadside scan infinite array environment using a combined 3D electromagnetic–circuit co-design process. The taper profile and length, feed location, and balun parameters are optimized for bandwidth and efficiency. Next, the element design is analyzed using a Floquet boundary simulation to examine scan performance in terms of scan impedance and polarization behavior in the principal and intercardinal far-field planes. Finite array performance is evaluated using a fully coupled 3D model of the antenna. Array weights for specific radiation patterns are computed using an optimization process for both broadside and scanned conditions.

Each element of the array is then coupled to a circulator, transmit power amplifier, and feed network. Antenna performance under continuous wave (CW) excitation is evaluated, and nonlinear effects of power amplifier gain compression on the transmit radiation pattern are observed. Per-element RCS with the circuit elements is computed to evaluate the antenna-mode scattering. Finally, the finite-sized array is integrated with a radome and installed on a 3D model of an aircraft to examine the platform installed performance.

Antenna Subassemblies for High Speed Wireless Datalinks
Partnering Company: Grante Corporation

Today’s high-speed point-to-point communication links place extreme demands on network operators. While high reliability and high capacity are essential, realizing this in practice is not trivial. Environmental or aesthetic constraints often limit the number of microwave links allowed and very costly real-estate on existing towers force designers to increase bandwidth using existing infrastructure.

This presentation highlights the design techniques and software used by Grante Corporation to address these needs. First, the author will show how Grante Corporation creates hybrid combiners and orthomode transducers with high inter-port isolation and low return loss to allow two independent channels to reliably use a single antenna. These antenna subassemblies leverage polarization and frequency combining techniques to achieve the required performance. Next, the author will discuss how Grante Corporation rapidly and efficiently designs hybrid transitions between standard waveguide components and custom components. This is one of the most critical steps for system success, as optimized designs need to be created under non-optimal real-world conditions. Design cycle reduction, from months to weeks, and cost savings due to smaller volumes that use less materials will be shown and discussed.
http://www.grante.hu

Fighting cancer with hyperthermia
Duke University

Induced heat for cancer therapy is called “Hyperthermia.” In normal tissues, blood flow dissipates part of the heat. In a tumor, however, circulation is often restricted. Applied heat results in a relatively large temperature rise and the tumor is weakened. When hyperthermia is used in combination with radiation therapy or chemotherapy, there is a dramatic improvement in response rates. The main difficulty in hyperthermia is to concentrate electromagnetic power in the tumor without damaging nearby healthy tissues.

At Duke University, a cylindrical phased-array applicator with four pairs of antennas has been developed. During hyperthermia treatment, the temperature changes are monitored with an MRI machine and magnitudes and phases of the antenna sources are adjusted experimentally during the treatment in order to concentrate power in the tumor. Because of slow temperature responses (due to thermal time constant of tissue) and limited treatment time, the optimum temperature level is difficult to obtain before the treatment is over. The authors will show how a 3D EM simulation, including a realistic human-body model, can tell the technician in advance how to drive the antennas.

The authors will show how the electromagnetic field results can be used to predict temperature distributions as a function of time in the tumor and the surrounding healthy tissue, taking into account blood perfusion and water cooling. The simulation results will be compared with the result of a clinical trial.
http://www.duke.edu

Employing 65 nm CMOS for WPAN Applications
Partner Companies: CEA-Leti; ST Microelectronics

The international unlicensed band around 60 GHz provides the potential for gigabit-per-second wireless communication and presents new, exciting opportunities for wireless personal area networks (WPANs). The advent of inexpensive complementary metal oxide semiconductor (CMOS) silicon-on-insulator (SOI) technology in the 65 nanometer regime offers an attractive alternative to more expensive III-V semiconductors such as gallium arsenide for millimeter-wave (MMW) applications. Corporations that harness these newer CMOS processes first have the opportunity to permanently alter the landscape in communications and networking IC design.

In this presentation, the authors discuss WPAN and explain the opportunities and challenges associated with designing 60 GHz radios in CMOS. Methods for successfully designing embedded passives and examples demonstrating how minor layout changes can impact overall circuit performance will be shown. Techniques for modifying passive and active design elements and the impact of these design changes in both the time and frequency domains also will be presented. Next, a 60 GHz receiver designed using STMicroelectronics’ 65 nm CMOS SOI process is introduced. The topology of the receiver and each block (LNA, mixer, VCO, and divider) are detailed. The presentation concludes with additional design insights gained from a system level simulation. It will be shown that an optimized design is not always the sum of individually optimized circuits and that the interplay between sensitive components is often the difference between a winning design and another re-spin.
http://www.cea.fr
http://www-leti.cea.fr
http://www.st.com

Left-Handed Metamaterials for Microwave Engineering Applications
UCLA

Research into artificial materials with negative permittivity and permeability, known as left-handed metamaterials, has grown rapidly in the past decade. Researchers have been exploiting the unique properties of left-handed metamaterials to develop novel electromagnetic applications and devices. Several international conferences and textbooks have emerged focusing on recent left-handed metamaterial development.

In this presentation, the unique properties of left-handed metamaterials are reviewed. By using a transmission-line approach to realize these metamaterials, planar, low-loss, and broadband microwave devices have been developed. Left-handed metamaterials based on the transmission-line approach are discussed in terms of analysis and implementation. Several metamaterial microwave devices that have been realized will be highlighted, including dominant leaky-wave antennas, small backward wave resonant antennas, dual-band couplers, and negative refractive index lenses. A unique metamaterial design guide will be discussed, showing how engineers can use 3D electromagnetic simulation combined with advanced circuit simulation to optimize the performance of these and other novel structures. This presentation concludes with a discussion of future trends on the application, implementation, and research of left-handed metamaterials.
http://www.ucla.edu

HIGH-PERFORMANCE IC AND ADVANCED PACKAGING DESIGN

Design and Verification of an EPC Compliant Passive UHF RFID IC
Partner company: TSMC

With its latest Electronic Product Code (EPC) compliant UHF RFID tag reference design, TSMC is enabling its foundry customers to integrate design, verification, and manufacturing work flows. Such integration helps drive first pass success and allows TSMC’s customers to get to market faster. Recognizing that RFID solutions must ultimately compete with existing bar code technologies that sell in the penny per copy range, TSMC is helping its customers achieve both of these mission critical goals. Moreover, TSMC is leveraging its expertise in CMOS production to drive manufacturing costs to a minimum. Working with Ansoft, TSMC is developing world class electromagnetic design and verification procedures. In the near term, TSMC’s approach should be very attractive to key semiconductor clients who are making significant investments in RFID in their chip distribution centers and who see a long-term, strategic potential in RFID markets.

This presentation details the design, simulation, and measurement of a passive backscatter UHF RFID system that meets the EPCglobal Class-1, Generation-2 Protocol. The presentation focuses on the challenges of the tag reference design and system-level verification. Design results for the rectifier, regulator, reset circuit, demodulator, and modulator circuits will be highlighted. Strategies for optimizing the charge-pump circuit will also be reviewed. Backscatter system verification is performed using electromagnetic/circuit/system co-simulation. Emphasis on the real-world issues of a varying environment, impedance fluctuations, received power at the tag, and reader sensitivity are considered. Laboratory measurement results for on-wafer and backscatter range performance will be presented.
http://www.tsmc.com

Ramping to Volume – Including Critical PCB & Packaging Effects in RFIC Design
Partner Company: UMC

Ramping to volume has become increasingly important in today’s environment characterized by short product life cycles, intense competition, and rapid changes in product and process technology. Numerous studies have found that product delays have an immediate impact on stock prices, with some finding a decrease in shareholder value ranging from 5.2 percent to 11.4 percent over the first two days from the time of the announcement. In addition, over that three-year span, firms announcing product delays "experienced negative abnormal performance in return on assets, return on sales and sales over assets," writes Vinod Singhal, professor of operations management at the Georgia Institute of Technology.

This presentation compares the traditional method used by the IC industry to examine silicon performance using simplified package (like QFN) and idealized reference design boards versus a more rigorous analysis that includes all the physical effects from packaging and realistic printed circuit boards. First, the author shows the performance of an ultra-wideband receiver together with a simplified package model and an idealized reference test board. Results for LO Leakage, DC Offset, Intermod products, and Noise Figure are shown. Next, a BGA or (flip-chip) package and an N (Minhong to define how many layers) layer PCB fabricated in FR4 is added to highlight the performance differences designers face when trying to implement high-performance silicon in real-world designs. The author concludes by highlighting a new methodology that allows the silicon, packaging and PCB designers to rapidly adjust active and passive elements of the system to achieve first-pass system success. Results from varying frequency-dependent layout as well as active circuits in the IC are shown in both time- and frequency-domain simulations.
http://www.umc.com

WiMax MIMO Circuit and System Design

This presentation provides design insight and a system understanding for combined Multiple-Input Multiple-Output (MIMO), Orthogonal Frequency Division Multiplexing (OFDM) signaling for WiMax communication systems. The OFDM-MIMO techniques have been adopted to support the high data rate and performance criteria for WiMax communication systems. The authors will analyze a WiMax radio system and explore the advantages and limitations of MIMO-OFDM under real-world circuit and system impairments.

The presentation begins with a brief overview of MIMO-OFDM leading to a simulated baseline comparison between standard SISO-OFDM and 2x2 MIMO-OFDM systems. That baseline is then extended to evaluate antenna, channel, and nonlinear circuit effects. Multiple antennas are analyzed using 3D EM simulation to compute input matching, mutual coupling, and radiation patterns. Effects of antenna placement on base-station and mobile terminals are explored by observing system error vector magnitude (EVM) to illustrate the tradeoff among the number of antenna elements, antenna orientation, and separation in the MIMO radio system. Linear and nonlinear radio circuits are then added to the system. Effects of I/Q imbalance, phase noise, and power amplifier gain compression are then evaluated in a full-up system-level MIMO-OFDM analysis.

13.56MHz Antennas and R/W modules for Mobile, E-Commerce Applications
Partner Company: FeliCA Networks, Inc.

In Japan, cell phones have become a desired platform from which to execute a series of transactions, from ordering concert tickets to receiving candy from a vending machine. FeliCa Networks, a joint venture between Sony, NTT DoCoMo, and the East Japan Railway Company, and its branded platform, Mobile FeliCa, have become synonymous with using your cell phone to pay for goods and services in Japan. A key component of a cell-phone-based mobile payment system is a small, low-power read/write (R/W) module with an integrated antenna. RFID antenna design always involves a delicate balance between power, circuit footprint, and cost. In a cell phone package where power and available space are in short supply, these design trade-offs become even more challenging.

In this presentation, the authors present the design of the read/write module and integrated RFID antenna. Design trade-offs are discussed as are the impedance matching challenges between the LSI (large scale integration) read/write module and the antenna. The presentation concludes with a comparison of the design’s modeled and measured results.
http://www.felicanetworks.co.jp

Circuit Simulation for First-Pass System Success

Achieving first-pass system success requires a balanced interaction of design tool methodology and technology capabilities. Device size, reusable analog and digital functionality and IP, design content and innovation are as critical as the underlying design processes and tools adopted. For this interaction to successfully occur, circuit simulation, a critical piece in the design process, should be flexible and robust to address the wide range and design diversity characterizing today’s electronic systems. And with technology products offering higher and higher content densities, simulation reliability and higher design accuracy become critical towards improving the odds of first-pass system success.

This presentation will address the latest technology developments in Nexxim’s circuit simulation capabilities that span three dimensions:

Expansion of algorithmic offerings to enable even greater design diversity
Continued focus on pushing the simulation speed-accuracy frontier even further
Design flow extensions and improvements to more efficiently analyze and characterize system performance.

Design and Modeling of High Speed High Density 3D CSP Packages and Memory Modules
Partner Company: Tessera Inc.

With the development in multi-core processors and new operating systems, there is an increasing demand for high speed, high capacity memory modules in high end PC, workstations, and blades servers market. The introduction of DDR2 and DDR3 with DDR4 road map had pushed the memory speed from 800 MHz to 1.6GHz/2.4GHz and beyond. New packaging technologies such as die stacking and package on package (PoP) are developed to meet the high performance, high density, high reliability, yet low cost challenges. Tessera’s MicroPILR Chip Scale Package (CSP) technology is used here for a high capacity 8GB DDR2 DIMM design, and is evaluated for DDR3/DDR4 applications.

In this presentation we demonstrate the design and testing of a high density DDR2 DIMM module; as well as the modeling and simulation methodology within the Ansoft tool environment. First, the electrical performance of a four height stacked PoP with 4Gb DRAM die is evaluated through detailed 3D modeling and extraction, and an equivalent spice-type circuit is obtained. The power/ground distribution network is also modeled and analyzed. The package electrical model is then combined with DIMM connector model, PCB transmission line and via models, and other passives to form the complete channel link models. Pre-layout timing and signal simulation with I/O circuit models are carried out in the integrated design environment through Ansoft Designer. Those modeling and simulation results are used to guide the design of an 8GByte VLP DIMM with target speed of 665MHz. The completed DIMM then is thoroughly simulated and analyzed to ensure the timing and signal integrity requirement before committed to manufacturing.

The package and link channel models are also studied for higher speed DDR3/DDR4 applications. I/O models with PRBS signal pattern at 1.6GHz, 2.4GHz, and 3.2GHz speed are applied to analyze jitters, SNR, ISI, loss, and eye-diagrams.
http://www.tessera.com

Achieving Design Closure Throughout IC/Package/Board

Achieving design closure throughout IC/Package/Board is a critical requirement for system design success in leading edge, high performance designs. This presentation highlights the strengthening of methodology through Ansoft technology to achieve First-Pass System Success. Real industry examples in the Signal Integrity (SI), Power Integrity (PI), and Electromagnetic Interference (EMI) are shown including simulation correlation to measurements.

In the first example, a package signal integrity benchmark problem proposed in the 2006 Electrical Performance of Electronic Packaging special session is solved using Ansoft’s solution. Different techniques from commercial vendors and academia using clusters of high-powered workstations to large supercomputer partitions were proposed and/or used to solve the problem over the course of several hours to days. Here, we used a single workstation using SIwave and achieved excellent correlation to the measurements provided using an extraction from DC to 30GHz in under two hours. For a Power Distribution Network (PDN) Analysis, a chip/package/board example using SIwave and an Apache Die power distribution model is shown followed by a Very Fine-pitch Ball Grid Array (VfBGA) Simultaneous Switching Output (SSO) Analysis and correlation. The presentation concludes with EMI/EMC example where design changes are quantified in SIwave and then correlated to EMI test results.

HIGH-PERFORMANCE ELECTROMECHANICAL AND POWER SYSTEMS

Low Delay, Digital PWM Controlled DC-DC Switching Power Supply
Partner Company: Nagasaki University

Switching power supplies with pulse width modulation and active power factor correction can minimize cost and power consumption. The term “switching” refers to the frequency of the input voltage (typically 50-60 Hz) being stepped up or switched with a high-speed transistor to 120 KHz. By operating at higher frequencies, the device can employ smaller capacitors and components to achieve the same output power. This reduces costs significantly. Pulse width modulation (PWM) is used in a closed feedback loop to minimize overall power consumption and the heat load on microprocessors. In this context, a PWM controller senses the power load on the power supply and adjusts the duty cycle of the high-speed switching transistor accordingly.

In this presentation, the authors introduce a novel low-cost, low delay, high current digital PWM controller for a DC-DC switching power supply. The trade-off between system cost and circuit propagation time is investigated. Absent from this design are isolation circuitry and an analog-to-digital (A/D) converter. Inputs voltages range from 3 to 8 V, and the output voltage is 1.5 V. The presentation concludes with a comparison of simulation and measured results.
http://www.nagasaki-u.ac.jp/english/

Integrating FEA into Existing Process Flows for Electrical Machine Design
Partner Company: Siemens AG

In the design of electrical machines, many engineering groups rely on in-house developed, highly customized design flows. Often, these design flows use internally written algorithms that define motor behavior analytically. While analytic methods work well initially, problems can occur when electrical machines become more complex and experience high levels of local saturation. For many cases, Finite Element Analysis (FEA) can provide the additional accuracy required and be deployed into existing design flows with very little disruption.

In this presentation, the authors show how designers at Siemens AG have embedded finite element technology into their existing design flows for electric machine design. This process begins by using MATLAB® as a front end GUI and having the engineer enter general motor parameters, including pole number, turns/coil, slot number, stator and rotor dimension, permanent magnet dimension and Id-Iq axis current. The input current is transformed from the dq0 to the abc reference frame and swept through its entire operating range. Through scripting commands the entire parametric finite element project is created and then solved. The solution matrix sent back to MATLAB includes the flux linkage in the d and q axis, the permanent magnet flux linkage, Torque, Bmax in the stator tooth and yoke, and an FFT on the radial component of the flux density in the air gap; all appropriate abc quantities are transformed to dq0. From this solution vector, the motor performance characteristic curves are created and reported back to the user. Using this method, electric machine designers at Siemens avoid having to learn details regarding FEA techniques and stay focused on their specific challenges.
http://www.usa.siemens.com

Optimization of Fast-Acting Actuators including Motion Induced Eddy Effects
Partner Company: MISO

Fast-acting actuators have been a mainstay in the transportation and industrial industries. These devices are incorporated in many applications, such as fuel injectors, power-train, antilock braking system, hydraulic control, and circuit breakers. Although the use of fast-acting actuators is widespread, the ability to optimize system performance that includes these actuators has proven to be quite challenging. Fast-acting actuators are used in complex systems where performance is degraded due to magnetic losses, transient electromagnetic fields, electric losses in coils, and nonlinear saturation effects.

In this presentation, the authors will show how to accurately include all these multi-physics effects in simulation so that system design can be optimized. First, drive circuitry using arbitrary elements is used to excite the actuator coil. Mechanical loads for the damping, spring, and hydraulic force are added. Electrical and mechanical effects are solved simultaneously in a time stepping transient solver that includes magnetic diffusion and motion-induced eddy currents. These effects are realized in the transient waveforms of the coil current, back EMF, armature position, velocity and acceleration. Next, distributed computing is used to dramatically reduce the total simulation time by spreading the simulation jobs across many compute nodes. Factors such as material conductivity, coil inductance, and inertia of moving parts are studied in order to optimize the design and enhance first-pass system success.

System Optimization of Motor Resolver including Drive Circuitry and Cable Parasitics

Variable-reluctance magnetic resolvers are widely used in the automotive and aerospace industries as angular position and speed sensors. They have certain advantages, such as high accuracy and reliability, compared with hall-effect sensors and optical encoders; this makes them an ideal candidate for applications involving traction motor drive of hybrid electric vehicles and flight control motor drive in aircrafts. In such applications accuracy and reliability are essential since there exist harsh environmental conditions, such as wide temperature range and strong vibration.

An issue continually faced by system integration engineers is that each sub-system or component (signal generator, shielded cable, magnetic resolver and resolver-to-digital converter) can be designed optimally by itself, but when connected together the overall system may not be optimized and, in fact, may not even meet the specification. Issues such as EMC/EMI and nonlinear inductance can have a large effect and need to be accurately accounted.

This presentation discusses a systematic approach in solving this problem. The entire system is broken up into three parts: signal generator, shielded cable, and the resolver. A physics-based parameter extraction tool is used to analyze the shielded cable extracting a parasitic R, L, C model. The resolver is analyzed using a parametric magnetostatic finite element electromagnetic field solver where an equivalent circuit model capturing the effects of the coil inductance is extracted. The system simulator includes the extracted cable and resolver model as well as the electric drive circuit. Various topologies are examined in order to determine the optimum system configuration.

Analysis of Eddy Current Brakes used in Transportation and Industrial Automation
Partner Companies: Magtrol Inc, Valeo Telma

The simple concept of motion-induced eddy currents creating a force or torque opposite to that of the source, thus providing a braking action, has been used in many industries, ranging from automotive, locomotive, and industrial automation, to name just a few. These eddy current brakes have several advantages, such as being extremely rugged, relatively simple to construct, no friction or wearing of brake pads, and usually needing only a simple DC excitation.

While eddy current brakes have been manufactured for many years, the virtual simulation of these devices is extremely complicated. To correctly simulate the operation of eddy current brakes, physical effects, such as motion-induced eddy currents in the nonlinear steel, its corresponding skin effect, saturation effects, and, in some cases, secondary eddy currents, must be considered simultaneously. The authors will show how a time-stepping transient finite element simulation with motion is utilized to realize all of these effects. The presentation will show the results from several individual customer simulations while pointing out the challenges of each design and the methodologies used to allow the simulation to be successful.
http://www.magtrol.com
http://www.valeo.com

Design of an Integrated Starter Alternator for HEV
Partner Companies: Valeo

An Integrated starter-alternator pack combines the design of a claw pole machine, used as both a motor and generator, and the design an advanced control scheme. A close interaction between the analysis of the alternator and development of the control is needed. First, engineers must carefully evaluate new topologies that combine geometric consideration of teeth shapes, magnet strengths and dimensions in order to meet the desired output power requirements and performance characteristics. Once the design of the alternator is realized, they have also to make sure that it will be compatible with the control system.

Claw pole alternators cannot be simulated accurately without using 3D finite element analysis (FEA). An analytical approach can give some estimation of the performance of the motors, but FEA is required in order to optimize the shape of the teeth, the material consumption, and local saturation levels. However, dynamic analysis in FEA means longer simulation time. Many transient simulations need to be performed to verify that a given setting provides output characteristics that meet the specification. Moreover, this approach is effective to design the alternator itself, but it is not enough to validate the whole system: the control plays a major role and needs to be validated along with the behavior of the alternator.

This presentation will propose a new method that enables designers to perform a complete simulation of the system that combines the electrical machine and the control system. The proposed method will use finite element electromagnetic techniques and system integration along with distributed processing. It will be shown how to accurately characterize the physics of the motor and use this characterization in a system simulation that takes into account the actual control scheme. Significant savings in simulation time will be shown since the transient solution will be realized in the system simulator instead of the finite element solver.
http://www.valeo.com

Design and Simulation of Power Converters using the Ansoft Power Suite
Dr. Roberto Prieto, Technical University of Madrid

This presentation will show how to combine the different Ansoft tools included in the Power suite (PExprt, Simplorer and Maxwell) in order to design and optimize power converters. The presentation will cover different design stages, from the magnetic components (including integrated magnetics) to the systems level, illustrating the use with an aerospace power system simulation. The presentation will cover the following topics and sections:

Design of magnetic components for power converters, illustrating the influence of the magnetic component design in the performance of the circuit and also how to use PExprt to optimize the design
Integrated magnetic component design. The advantages of the integrated magnetics and interleaving techniques in power converters will be shown. The use of PExprt and Simplorer to design the magnetic components will be presented. The use of Maxwell 3D will be also illustrated.
Digital control design. The use of Simplorer in combination with Matlab (classical approach) or using the genetic algorithims included in Simplorer will be presented. An example using a VHLD implementation of the digital control in Simplorer will be included.
System design. The use of Simplorer implementing the power converter models in VHDL-AMS for system simulation will be presented. A real power aerospace system will be included, comparing Simplorer simulation results with real measurements.

http://www.ucm.es/UCMD.html

Carbon-Carbon Ultracapacitor Equivalent Circuit Model, Parameter Extraction, and Application
Dr. John M. Miller, VP Adv. Transportation,
Dr. Uday Deshpande, Director Power Engineering
Dr. Marius Rosu, Group Leader Simplorer
Maxwell Technologies, Inc. San Diego

Ultracapacitors are becoming widely accepted in the energy storage industry for their high pulse power, extreme cycling capability, robustness, efficiency and calendar life. Many different equivalent circuit models have been proposed for ultracapacitors over the years. Most of these models focused either on the small signal behavior and long term natural decay characteristics of ultracapacitor charge or on their high current behavior. Maxwell Technologies has pursued the latter approach expanding on the high current character because this characterizes their usage better in terms of energy stored, power capability and efficiency. As applications, especially in heavy hybrids, have evolved the voltage levels of ultracapacitor modules has increased substantially from early modules rated 15V to 16V for suitability to automotive systems to 48V to 70V for industrial truck and wind turbine applications, to 125V to 390V packs. Heavy transportation modules rated 125V and 390V in fact are routinely stacked to form high voltage strings of 500V to 1,150V. Equivalent circuit models for such packs must account for parasitic elements of interconnect ESR and ESL. This presentation covers the model development and parameter extraction using Ansoft Q3D. The ultracapacitor model is now available from Ansoft as a Simplorer v8.0 library model.
http://www.maxwell.com

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