< BACK

PETER AAEN
Freescale Semiconductor, RF Division

TITLE:
A Methodology for the Accurate Simulation of Plastic Effects within Packaged Microwave Devices

ABSTRACT:
A general procedure to examine the effect of plastic encapsulants on circuit components found within packaged microwave devices will be presented. The plastic encapsulant was found to reduce the package isolation, increase parasitic capacitances, increase loss and shifted the frequency response of the packaged device. A rigorous methodology for the measurement of these encapsulated packages was developed. Ansoft's HFSS was able to accurately predict all plastic-induced effects, and excellent agreement between measured and simulated results was obtained.

BIO:
Peter H. Aaen received a B.A.Sc. in engineering science and an M.A.Sc. degree in electrical engineering from the University of Toronto (Toronto, Ontario, Canada) in 1995 and 1997. In 1997, he joined the RF Division of Freescale Semiconductor Inc. (formerly Motorola) in Phoenix, Arizona, where he manages the modeling team responsible for the development of high-power RF electrothermal LDMOS models. Areas of current interests include the development of package modeling techniques, modeling of passive components, as well as techniques for the measurement and model development of nonlinear electrothermal transistors.

< BACK

KARL BOIS
Hewlett-Packard Company

TITLE:
On the Use of Tapered Lines for Electrical and Mechanical Reliability in High-end Servers

ABSTRACT:

In high-end servers, the routing density in PCBs is ever so increasing. This has lead to a direct increase in the thickness of such boards. For mechanical considerations, thinner PCBs are preferred. However, in an ideal 50-ohm environment, which is sought for most high-speed signaling approaches, this directly reduces the width of the stripline conductors. This, in turn, increases the overall DC and frequency-dependent conductor losses.

For significant trace lengths (e.g., 20 inches or 50 cm), this can severely reduce the available voltage margin. To satisfy both electrical and mechanical constraints, a tool more common in microwave devices can be used: The taper line. Using tapered traces, narrower lines in a thinner board tailored to 50 ohms can be flared to wider lines of lower impedance. If the transformer is appropriately chosen, the reduction in total insertion loss outweighs the effect of return loss. Hence, from a system perspective, tapered lines could reveal themselves to be a useful tool in high-speed systems.

Here, a feasibility study conducted with the use of HFSS will be presented. The study shows that striplines with 75-100 micron wide lines and 50 ohm characteristic impedance can be flared to double their initial width to produce a much better overall throughput. In addition to discussing in detail our findings, general guidelines will be presented as to the overall applicability of these tapered lines as a function of total line length, bandwidth, and overall system losses.

BIO:
Dr. Bois received his BS and MS from the Electrical Engineering department at the Université Laval, Québec, P.Q., Canada, in 1993 and 1995, respectively. He obtained his Ph.D. degree from the Electrical and Computer Engineering Dept. at Colorado State University (Fort Collins, Colorado) in 1999. Shortly thereafter, he joined the Electrical Structures and Signals group at Hewlett-Packard, which is associated with the Hardware Systems & Technology Division (HSTD) in Fort Collins, Colorado. His main functions include signal-integrity analysis of next-generation computer chip packages and PCB, development of modeling techniques for transmission line structures, and implementation of test benches for experimental verification. He has authored and co-authored more than 40 journal publications, conference presentations and proceedings, technical reports, and overview articles. Additionally, Dr. Bois has five U.S. patents granted.

< BACK

ROMEN CUBILLO
(Formerly with Mahi Networks)

TITLE:
Three Golden Rules for High-speed PCB SI Design

ABSTRACT:
Mr. R. Cubillo will present the design-flow process addressing high-speed signal-integrity issues in the RF and Optics Telecommunication industry. It will include the concept of an "interactive design platform" made up of multiple modeling SW tools, CAD tools, and HW test result as well as a database for lifecycle management of sim/CAD/test files and documentation. For a given 10 Gb/s optical transponder project targeting long reach SONET performance, two different designs will be presented with broadband (DC-20 GHz) simulation and lab test result. Simulation output will clearly show which design will lead to the highest yield/cost ratio and some Design Validation Test result of the optimum design will be presented.

BIO:
Mr. Cubillo has nine-plus years of expertise in optoelectronics and six years in 10 Gb/s simulation and testing.

< BACK

MOHAMMAD KOLBEHDARI
Intel

TITLE:
High-frequency Modeling of Next Package Generation

ABSTRACT:
With ever-increasing differential bus bit rates and industry demands for increasing processor frequency of operation, the need for new package modeling and simulation using a full-wave model is required by computing and communication industries. The high-frequency modeling of desktop, enterprise, and mobile platforms including package, PCB, via, socket, stub, connector, and interposer is required to characterize the interconnect losses and measure the eye at the receiver ends considering the losses due to the material, stack-up, and topology.

BIO:
Mohammad Kolbehdari is Senior Staff platform architect in the Digital Enterprise Group, Intel Corporation. He received his Ph.D., MS, and BS degrees in Electrical Engineering from Temple University (Philadelphia, Pennsylvania), University of Mississippi (Oxford MS), and Communication University (Tehran, Iran) in 1994, 1991, and 1986, respectively. He conducted research in the EM lab at Temple University prior to joining the Department of Electronics, Carleton University, Ottawa, Canada, as a research associate faculty member from 1994 to 1998. He joined Intel in 1998 and has been involved in many product-development teams, including the Pentium® 4 FSB and PCI Express electrical designs. His areas of interest are EM modeling, power delivery, signal integrity, I/O serial differential design, system-level architecture, platform initiatives, and clock jitter characterization and measurements. His email is mohammad.kolbehdari@intel.com.

< BACK

PETER SLETTMAN
Cushcraft Corporation

TITLE:
Analysis and Design of Radiating Elements Using HFSS

ABSTRACT:
In this presentation, we look at the design and analysis of some novel radiating elements that will highlight the advantages of using HFSS. In particular, we will look at element design for linear arrays using various features in HFSS.

BIO:
Dr. Peter Slettman is Director of Engineering at Cushcraft Corporation in Carlsbad, California, where he is responsible for antenna design and development. He was previously Antenna Engineering Manager at REMEC Inc. in Milpitas, California, where he was responsible for all antenna-related design, development, and research activities. His group also supported the business units within the REMEC corporation with design and software expertise on computational electromagnetics, optimization, and automated design.

Dr. Slettman earned his doctorate in electrical engineering from Chalmers University in Gothenburg, Sweden, specializing in microwave antennas and computational electromagnetics. He also holds a masters degree in Engineering Physics from the University of Linkoping, Sweden. He was a visiting researcher at the University of Mississippi in 1996 and 1997 and the Technical University of Denmark in 1994.

Dr. Slettman has published more than 30 technical articles, proceedings articles, and reports. He has given presentations and taught short courses in the USA, Canada, France, Italy, Sweden, Denmark, Norway, Finland, and the Netherlands. He is a Senior Member of the IEEE and is active in the Antennas & Propagation and Microwave Theory & Techniques societies. He serves as a reviewer for the IEEE Transactions on Antennas & Propagation and the IEEE Antennas & Propagation Magazine.

< BACK

SOOLIAM OOI
Motorola

TITLE:
UHF Handset Monopole antenna designed for SAR compliance using HFSS

ABSTRACT:
This paper describes the design of a quarter-wave monopole antenna for a portable radio operating in the UHF band using HFSS. The Specific Absorption Rate (SAR) has become an important design criterion for wireless devices. A portable must meet various SAR regulatory standards. As a result, antennas are designed not only to meet the required matched bandwidths and efficiencies or gains, antennas are to be designed such that the whole antenna-chassis configurations do not result in SAR levels exceeding the compliance limits in the bodies of users. Traditionally, SAR is tested after the complete portable device has been put together. The designs would have to go through a few iterations of modifications and measurements before the design is finalized should the designs result in high SAR levels. While antenna design works have migrated from cut-and-measure to computer-aided design, it is now possible with the help of EM modeling to design an antenna to ensure SAR compliance.

BIO:
Sooliam Ooi joined Motorola in 1989 and spent the first 10 years of his career on RF circuit design, antenna integration and EMI measurement for public safety two-way radios. He is currently attached to the Center of Wireless research in Florida. He uses HFSS and Ansoft Designer for antenna and RF interconnect design and development and SAR predictions.

< BACK

PAOLO MACCARINI
University of California in San Francisco

TITLE:
Antenna Design Using HFSS for Hyperthermia Applications

ABSTRACT:
Hyperthermia can significantly improve the efficacy of chemotherapy and/or radiation treatments for cancer. Primary challenges to delivering effective hyperthermia are more uniform power deposition and control of tissue temperature. We are developing a flexible PCB-based conformal microwave array applicator that integrates dual concentric conductor (DCC) radiators for heating tissue with concentrically mounted radiometric receive antennas for monitoring temperature. Geometrical parameters, coupling bolus, and electrical/thermal properties of the heterogeneous target tissue strongly affect performance. Due to the design complexity, we used HFSS to perform parametric studies of antenna design variables and tissue loading parameters which affect power deposition. Field measurements in liquid muscle-equivalent phantom corroborated our simulation results.

BIO:
Paolo Maccarini was born in Torino, Italy. As a recipient of a European student award, the Erasmus Program, he received a BS and MS in electrical engineering from both France and Italy. In 2002, he received his MS and Ph.D. in electrical engineering from the University of California, Santa Barbara, working on nonlinear phased arrays. He is currently working as a post-doc researcher in the radiation oncology department at the University of California, San Francisco (UCSF). His research focuses on the development of a noninvasive hyperthermia treatment for near-surface cancer using conformal microwave antenna arrays for both treatment and temperature monitoring. His colleague Hans Olav and his supervisor Professor Stauffer contributed to this presentation.

< BACK

MARVIN RYKEN
NAVAIR, Pt. Mugu, CA

TITLE:
Conical Structures in HFSS

ABSTRACT:
Entering conical symmetric structures into HFSS for solving has been a difficult problem. This presentation will highlight tricks that have been developed to efficiently enter antennas on conical surfaces and obtain solutions. An example of a microstrip patch antenna on a conical surface will be given.

BIO:
Dr. Ryken has a BSEE, MSEE, and Ph.D. in electrical engineering, specializing in electromagnetic theory. He has 40 years of experience in the microwave component and Electronic Warfare systems area. He is currently a part of the antenna design team at NAVAIR, Pt. Mugu, CA., specializing in developing conformal antennas for advanced munitions. He has more than 20 patents in the antenna area and has presented and published extensively.

< BACK

JIM REED
Optimal Designs

TITLE:
Combline Cavity Filter Design in HFSS

ABSTRACT:
A cavity combline filter is tuned live in practice with a network analyzer by adjusting the tuning screws above the resonators and tuning screws in the irises, acting as capacitance to ground and inductive coupling between resonators, respectively. The same practice is implemented in the simulation realm. HFSS will be used to analyze a large parametric analysis of tuning screws above the resonators and in the irises to create the desired filter response. The Tuning Bar in Ansoft Designer will be employed to view HFSS parametric data and tune the filter. A comparison of simulation to measured data will be provided.

BIO:
Jim Reed operates an engineering service company through the incorporation of Optimal Designs Inc. and has eight years of extensive experience in EM simulation tools, both as an aerospace design engineer for microwave devices and as an EM Simulation Application Engineer (Ansoft and CST). Optimal Designs offers EM simulation advanced training services for large aerospace companies to ensure proficiency with their engineering tools and EM simulation design services for companies that benefit from additional engineering support and services.

< BACK

VALERY DOLGASHEV
Stanford Linear Accelerator Center

TITLE:
Design of Compact Multi-megawatt Mode Converter

ABSTRACT:
Experience gained during the recent operation of high-power 11.424 GHz RF sources for accelerators led to new, stricter requirements on system components. One of the basic components of such a system is a mode converter that transforms the rectangular waveguide mode into the TE01 mode in circular waveguide. With such a converter, it is possible to minimize the use of the WR90 rectangular waveguide, which was shown to be a weak part of the previous system at power levels higher than 100 MW and pulse lengths on the order of a microsecond. We used several methods to design a mode converter with extremely low parasitic mode conversion and compact size. These methods employ HFSS and include multi-parameter searches, concurrent optimization with a mode-matching code cascade, cascading of resulting S-matrices, and tolerance analysis using perturbation techniques. This report describes the design methods and presents results.

BIO:
Valery Dolgashev graduated from the Physics Department of Novosibirsk State University in 1990 and received his Ph.D. in physics from Budker Institute of Nuclear Physics (Novosibirsk, Russia). He worked as a Research Physicist in the same institute from 1990-1999. Since 1999, he has been a visiting scientist at Stanford Linear Accelerator Center, where he works in the High Power Microwave Group of the Accelerator Research Department. His expertise is in microwave (10-40 GHz, 100 MW) and high-energy accelerator physics and technology.

< BACK

DAVID WEINSTEIN
Amphenol RF

TITLE:
Method for Designing a 200-watt, 2.2 GHz, Continuously Operating Shorting Switch

ABSTRACT:
Most switches are designed for low reflection operation. This unusual application requires a solenoid operated switch that can operate continuously in either the short or open circuited condition while safely dissipating 200 watts at an ambient temperature of +85 C over a frequency range from 0.8-2.2 GHz. This presentation will detail the process for developing this switch using Ansoft HFSS and ePhysics. The effects of varying specific parameters will be shown as the switch evolves from its initial design to final configuration.

BIO:
David Weinstein received his BSEE from the City College of New York in 1975. Over the past 37 years, he has held various laboratory, engineering, and management positions with several connector companies and defense contractors. He currently has four patents and several publications relating to connectors. Since 1997, he has been the Principal RF Engineer with Amphenol RF, specializing in the RF design and analysis of connectors and other microwave devices using Ansoft HFSS software.

< BACK

Guo Chen
Hughes Network Systems

TITLE:
Ku-Band Antenna Feed System Design - ISIS Transmit/Receiver Isolation Assembly (TRIA) for DirecWay Broadband Satellite Terminals with Ansoft HFSS

ABSTRACT:
This presentation will introduce the design of Ku-Band microwave devices for DirecWay broadband satellite terminals.

HFSS was the main tool in the design and optimization of microwave components and subsystem for Ku-Band Antenna Feed System for low-cost/high-performance DirecWay products at Hughes Network Systems. The function of TRIA is to pick up satellite signals-receive signal 10.95-12.75GHz in both horizontal and vertical polarizations from Antenna feedhorn, separate and send them to low-noise block (LNB), and simultaneously send the transmitting signal 13.75-14.5GHz to satellite via the same feed-horn/reflector. ISIS TRIA is composed of an orthogonal mode tranducer (OMT), a diplexer T-junction, two low pass filters and a high pass filter and a couple of waveguide twists.

Every component of ISIS TRIA was designed and optimized with HFSS versions 8.0 and 8.5. The power of HFSS covers draft angles design for low-cost manufacturing purposes, and tolerance analysis for yield estimation for IRIS TRIA. With more than 62 percent cost reduction compared with previous TRIA for DirecWay satellite broadband terminals, ISIS TRIA is a typical successful product which has been deployed in more than 350,000 units so far.

BIO:
Not supplied

< BACK

SRIDHAR KANAMALURU
Sarnoff Corporation

TITLE:
The Design of a Ka-band Monopulse Comparator Using HFSS

ABSTRACT:
The Ka-band waveguide monopulse comparator is a tri-plate assembly. The four inputs to the comparator accept RF signals from the four quadrants of a tracking antenna. Rat-race networks combine two inputs at a time to provide "sum" and "difference" signals. The two "sum" signals are then combined in another rat-race network to form the "SUM" and "Elevation Difference" and "Azimuth Difference" channels. To facilitate compact size, waveguide bends are used at several locations within the tri-plate assembly. External waveguide terminations are used to terminate all unused ports. HFSS is used to simulate the entire structure, including all rat-races, waveguide bends, and transitions.

BIO:
Dr. Sridhar Kanamaluru, Manager, Microwave Systems, leads a team of RF, microwave, and systems engineers and staff at Sarnoff Corporation (Princeton, NJ). Dr. Kanamaluru's team develops satellite communications terminals, radio systems, radar front-ends, and high-power amplifiers applicable to the US DoD and commercial applications. Dr. Kanamaluru and his team developed Ku- and Ka-Band satcom terminals for on-the-pause (OTP) and on-the-move (OTM) applications of the US Army and commercial DBS markets. Dr. Kanamaluru's team also has developed high-power amplifiers for JTRS, Ku- and Ka-band applications.

< BACK

KEN HERSEY
Contractor, NASA, QSS Group

TITLE:
Application of HFSS for Predicting and Eliminating Enclosure Resonances of RF Products

ABSTRACT:
Confronted with prototype hardware test results suggesting box resonance issues, the performance of NASA/GSFC's Ka-band transmitter was dramatically improved through a redesign guided by HFSS analyses. With mechanical and layout constraints in hand, the RF channel was modeled, complete with substrates, MMIC packages, and the radiating bondwires. Animated 3D swept-frequency cloud plots vividly highlighted the resonance issues. Multiple resonance mitigation concepts were analyzed, guided by the graphical results, leading us to a mechanical modification which restored the desired transmitter performance.

BIO:
Ken Hersey received his BSEE in 1989 from NC State and his MSEE in 1994 from George Washington University, specializing in Satellite Communications. For more than ten years, he worked at NASA's Goddard Space Flight Center (GSFC) as Head of the Antenna and Tracking Section. After three years in private industry, he returned to the government as a NASA contractor under QSS Group, Inc. Ken's expertise is focused toward antennas, especially computational analyses, detailed antenna design, and advanced measurement techniques. His major accomplishments include several successful spacecraft antennas and microwave instruments, the development of novel frequency agile antennas and marketing demonstrations, and the implementation GSFC's hybrid anechoic chamber, including writing its test-and-measurement software. Ken is a member of the Antenna Measurement Techniques Association.

< BACK

JASON MILLER
Sun Microsystems

TITLE:
Characterizing and Modeling the Impact of Power/Ground Via Arrays on Power-Plane Impedance

ABSTRACT:
In this presentation, the impact of power/ground via arrays on power-plane impedance is studied. 8 x 8 via array structures are characterized, and the results are compared to full-wave field simulation using HFSS. These results show that the impedance and effective inductance is a strong function of location within the array. The lowest impedance is found on the array perimeter, and the impedance is several times higher in the array center. The impact antipad size and dielectric thickness on the plane impedance and inductance is examined using parameterized models.

BIO:
Jason Miller is a Staff Engineer at Sun Microsystems, where he works on ASIC I/O cell development, ASIC packaging, interconnect modeling and characterization, and system simulation. Jason received his Ph.D. in Electrical Engineering from Columbia University.

< BACK

ZOLTAN CENDES (San Jose and Boston)
Ansoft Corporation, Chief Technical Officer

TITLE:
Best in Class, Better Together

ABSTRACT:
This keynote presentation will provide an overview as well as technical details relating to HFSS and other Ansoft products. An emphasis will be placed on how these design tools are used individually, as well as together, to enable the design of high-performance electronic products.

BIO:
Dr. Zoltan Cendes is Founder and Chairman of Ansoft Corporation (Pittsburgh, PA). He also serves as Ansoft's Chief Technology Officer and is responsible for managing the company's research and development. In this role, he sets the overall direction of Ansoft's technology and products.

Dr. Cendes has made significant contributions in the area of finite element modeling of electromagnetic devices. In particular, he solved the problem of spurious modes that, prior to his work, had made the application of finite element methods in electrical engineering impractical. He, along with his coworkers, developed new types of finite elements called tangential vector finite elements that eliminate the problem of spurious modes. He also introduced the Delaunay mesh generation algorithm and adaptive mesh refinement procedures to finite element analysis and the transfinite element method and model order reduction procedures to high-frequency electromagnetics. Cendes' original research in these areas made possible many of Ansoft's products, including Maxwell, Spicelink and HFSS.

Prior to forming Ansoft in 1984, Dr. Cendes served six years with the General Electric Corporation, first in the Large Steam Turbine Generator Division and then in the Corporate Research and Development Center, where he was responsible for developing finite element computer codes. In 1980, he was appointed Associate Professor of Electrical Engineering at McGill University (Montreal, Canada). In 1982, he joined the faculty of Electrical and Computer Engineering at Carnegie Mellon University (Pittsburgh, PA), where he was Professor until 1996. Since that time, he has been an adjunct Professor at Carnegie Mellon.

Dr. Cendes received his MS and Doctoral degrees in Electrical Engineering from McGill University. He was recently elected as an Institute of Electrical and Electronics Engineers (IEEE) Fellow. He is a member of the MTT Technical Committee on CAD, is on the editorial board of the International Journal of RF and Microwave Computer-Aided Engineering, and was appointed IEEE AP-S Distinguished Lecturer in 2001. Additionally, he has served on the International Steering Committee of the COMPUMAG Conference and is a past chairman of the IEEE Conference on Electromagnetic Field Computation.

< BACK

BRAD BRIM (San Jose and Boston)
Ansoft Corporation, HFSS Product Marketing Manager

TITLE:
HFSS v10: Product Preview

ABSTRACT:
This presentation will preview the contributions of HFSS v10. The contributions will be enumerated, briefly explained, and simple examples provided. The intent is to provide an understanding of the content of HFSS v10 and to whom they will be relevant. The presentation will conclude with a discussion of hardware and operating system platforms supported by HFSS v10.

BIO:
Brad Brim received a BSEE in 1982 and MSEE in 1983 from Washington State University in Pullman, Washington. He worked on analytical and numerical aspects of high-frequency scattering during his MSEE program. Brad worked toward a Ph.D. from 1983 to 1988 at the University of Colorado in Boulder. His area of research was numerical modeling of planar circuits. In 1988, Brad joined the CAE group of Hewlett-Packard Company (Santa Rosa, California), which later became a part of Agilent Technologies. Brad worked as a developer for the initial releases of both Momentum and HP-HFSS; and in 1999, he assumed responsibility for product marketing activities for EM design tools in the EEsof division of HP. In 2000, Brad joined Ansoft (Boulder, CO) as an Application Engineer in the area of high-frequency design. In 2001, he became the Product Marketing Manager for HFSS.

< BACK

JOHN SILVESTRO (San Jose and Boston)
Ansoft Corporation, Senior Member of Technical Staff

TITLE:
HFSS v10 Jump Start for HFSS v9 Users

ABSTRACT:
This training session for all attendees will focus on a key contribution of HFSS v10: A robust path from complex solid models to successful HFSS analysis. This is a multi-step process, from solid model import and healing, to mesh generation in the presence of model irregularities, to adjustment of model resolution. The new solid model import healing algorithms and their control will be reviewed. A review and demo will be provided for the more robust meshing algorithms, which have been implemented for HFSS v10. An overview of the new feedback mechanisms from the mesh algorithms will be provided. Lastly, an overview and demo of the new model resolution capability will be provided, which enables simplification of designs with electrically insignificant geometric complexity while maintaining high accuracy of analysis results.

BIO:
John W. Silvestro holds a BSEE, MSEE, and Ph.D. in Electrical Engineering from Case Western Reserve University in Cleveland, Ohio. Before coming to Ansoft, he worked for the ElectroScience Lab at Ohio State University and Clemson University. For the last nine years, he has worked for Ansoft, where he is a Senior Member of Technical Staff working in the Pittsburgh office.

< BACK

DENIS SOLDO (San Jose)
Ansoft Corporation, Application Engineer

TITLE:
High-speed PCB Design

ABSTRACT:

Training Session Track A: This training session will explore in more detail the Gigabit Backplane Signal Integrity Design Kit, which is based on the Xilinx MK322 Evaluation Board for the Xilinx Virtex-II Pro X® FPGA. The Xilinx Virtex-II Pro X has a maximum data rate of 10 GB/s with a 30 ps rise time. This high data rate can suffer significant degradation after the signal has passed through the transmission path. The transmission path includes the FPGA package, transmission lines, differential via, and connectors. Transmission degradation includes loss of signal amplitude, reduction of signal rise time, and a spreading at the zero crossings. It is critical to model the transmission path correctly when designing a high-performance, high-speed serial interconnect system.

High-speed PCB Design Training Session: This training session will focus on the use of HFSS to analyze the SMA-to-board transition from the Xilinx channel design. The session will cover the approach to take when multiple design files have to be merged together to form one cohesive model. Once a working model is created, successful simulations will depend on three key points: Return path, port definitions, and boundary conditions. These key topics will be covered in detail to show best practices in getting accurate S-parameter data that eventually will plug into Ansoft Designer for a system simulation.

BIO:
Denis Soldo is a High Frequency and Signal Integrity Application Engineer and has been with Ansoft for two-and-a-half years. He works in the San Jose, California, office. Prior to joining Ansoft, he worked with Alcatel in Dallas, Texas, on designing high-capacity optical carriers. He came to the United States from Sarajevo in 1995; in a short time, he received a BS in Electrical Engineering from the University of Kansas. His major involvement is in daily customer and technical support with SI and HF issues. He is a member of IEEE and the National Society of Professional Engineers.

< BACK

CHRIS HERRICK (Boston)
Ansoft Corporation, Application Engineer

TITLE:
High-speed PCB Design

ABSTRACT:
This training session will focus on the use of HFSS to analyze the SMA-to-board transition from the Xilinx channel design. The session will cover the approach to take when multiple design files have to be merged together to form one cohesive model. Once a working model is created, successful simulations will depend on three key points: Return path, port definitions, and boundary conditions. These key topics will be covered in detail to show best practices in getting accurate S-parameter data that eventually will plug into Ansoft Designer for a system simulation.

BIO:
Chris Herrick received his BSEE from Tufts University and his MSEE in Wireless Communications from Stanford University in 2000 and 2002, respectively. Prior to joining Ansoft in 2004, he worked as a Signal Integrity Engineer for Sanmina-SCI, where he developed new patented via technology. He also worked at Hewlett-Packard as a Signal Integrity Engineer focusing on the design of server computers. As an Ansoft Application Engineer, Chris works out of the company's Burlington, Massachusetts, office, supporting the full line of Ansoft's Signal Integrity products.

< BACK

AARON EDWARDS (San Jose - material not being presented in Boston)
Ansoft Corporation, Application Engineer

TITLE:
High-speed IC Packaging Design (BGA)

ABSTRACT:

Training Session Track A: This training session will explore in more detail the Gigabit Backplane Signal Integrity Design Kit, which is based on the Xilinx MK322 Evaluation Board for the Xilinx Virtex-II Pro X® FPGA. The Xilinx Virtex-II Pro X has a maximum data rate of 10 GB/s with a 30 ps rise time. This high data rate can suffer significant degradation after the signal has passed through the transmission path. The transmission path includes the FPGA package, transmission lines, differential via, and connectors. Transmission degradation includes loss of signal amplitude, reduction of signal rise time, and a spreading at the zero crossings. It is critical to correctly model the transmission path when designing a high-performance, high-speed serial interconnect system.

IC Packaging Design (BGA) Training Session: This training session will focus on the use of HFSS to fully characterize a set of differential lines from a BGA package. Since this is a critical section of the overall end-to-end channel, there will be several key simulation strategies that will be discussed. Topics include return path, model reduction, and splitting the model in the most appropriate places. AnsoftLinks also will be used to translate the BGA package model into the Ansoft design environment. Once the BGA model is characterized, the S-parameter results will be fed to Ansoft Designer for the system simulation.

BIO:
Aaron Edwards received his BSEE from California Polytechnic State University in Pomona, CA. Aaron previously worked as a signal-integrity engineer at Packard Hughes Interconnect, where he designed and tested high-speed flexible printed circuit boards used in the telecommunications industry. He joined Ansoft in 2000 as an Application Engineer for the company's suite of signal-integrity analysis tools.

< BACK

BRYAN BOOTS (San Jose)
Ansoft Corporation, Application Engineer

TITLE:
High-speed Via and Padstack Design

ABSTRACT:

Training Session Track A: This training session will explore in more detail the Gigabit Backplane Signal Integrity Design Kit, which is based on the Xilinx MK322 Evaluation Board for the Xilinx Virtex-II Pro X® FPGA. The Xilinx Virtex-II Pro X has a maximum data rate of 10 GB/s with a 30 ps rise time. This high data rate can suffer significant degradation after the signal has passed through the transmission path. The transmission path includes the FPGA package, transmission lines, differential via, and connectors. Transmission degradation includes loss of signal amplitude, reduction of signal rise time, and a spreading at the zero crossings. It is critical to correctly model the transmission path when designing a high-performance, high-speed serial interconnect system.

IC Packaging Design (BGA) Training Session: This training session will focus on the use of HFSS to analyze via transitions in complex board and package environments. Model creation, ports, and boundaries will be discussed, with an emphasis on differential transitions. Potential tradeoffs between model complexity and simulation efficiency also will be discussed.

BIO:
Bryan Boots received a BSEE and an MSEE from the University of Colorado, Boulder, in 1999. His studies included an emphasis on computational electromagnetics. In March 2000, he joined Ansoft as an Application Engineer for the company's High Frequency products.

< BACK

JIM DELAP (Boston)
Ansoft Corporation, Application Engineer

TITLE:
IC Packaging Design (BGA)

ABSTRACT:
This training session will focus on the use of HFSS to analyze via transitions in complex board and package environments. Model creation, ports, and boundaries will be discussed, with an emphasis on differential transitions. Potential tradeoffs between model complexity and simulation efficiency also will be discussed.

BIO:
As an Application Engineer, Jim DeLap specializes in High Frequency products, including HFSS and Ansoft Designer. Prior to working at Ansoft, he designed many products, ranging from millimeter-wave mixers and antennas to integrated radios in the 30-60 GHz range. He earned his BSEE from the University of Lowell (Lowell, MA), his MSEE from the University of Virginia (Charlottesville, VA), and has worked at companies such as Millitech, Raytheon, and Agilent Technologies.

< BACK

BRAD BRIM (San Jose and Boston)
Ansoft Corporation, HFSS Product Marketing Manager

TITLE:
Combining HFSS with Circuit Analysis for Efficient RF/Microwave Design

ABSTRACT:
This training session will focus on the combination of HFSS with circuit design techniques. The result of this combination is a design process with significant savings of overall design time and tedious engineering time. The basic concepts are presented in a tutorial manner, and an overview of how these capabilities are automated in both HFSS and Ansoft Designer is presented. Simple examples are applied to convey the concepts, and much more complex designs are provided as examples of actual designs. Both HFSS and Ansoft Designer projects will be provided to serve as a guide to quickly begin applying this technique.

BIO:
Brad Brim received a BSEE in 1982 and MSEE in 1983 from Washington State University in Pullman, Washington. He worked on analytical and numerical aspects of high-frequency scattering during his MSEE program. Brad worked toward a Ph.D. from 1983 to 1988 at the University of Colorado in Boulder. His area of research was numerical modeling of planar circuits. In 1988, Brad joined the CAE group of Hewlett-Packard Company (Santa Rosa, California), which later became a part of Agilent Technologies. Brad worked as a developer for the initial releases of both Momentum and HP-HFSS; and in 1999, he assumed responsibility for product marketing activities for EM design tools in the EEsof division of HP. In 2000, Brad joined Ansoft (Boulder, CO) as an Application Engineer in the area of high-frequency design. In 2001, he became the Product Marketing Manager for HFSS.

< BACK

BRIAN GRAY (San Jose)
Ansoft Corporation, Application Engineer

TITLE:
Antennas and Scattering: What's New or Different in HFSS v10

ABSTRACT:
This training session will focus on additions to HFSS v10 and enhancements since HFSS v9.2 in the area of Antennas and Scattering. The intent of this session is to provide an overview for several topics, which will include the following: RCS calculation enhancements, automated computation of reflection and transmission for FSS, a new set of 'incident wave sources,' mesh re-use capability, links to HFSS from existing HFSS projects or SIwave projects, improvements in far field calculations, and more. The objective is to provide an introduction to these capabilities so users are better prepared to immediately and effectively apply them in HFSS v10.

BIO:
Brian Gray received his BSEE from New Mexico State University (Las Cruces, New Mexico) in 1992 and his MSEE from Ohio State University (Columbus, Ohio) in 1995. He is a member of Tau Beta Pi, Eta Kappa Nu, and IEEE. From 1988 to 1992, he worked for Los Alamos National Laboratory as a research assistant in the area of nondestructive assay. From 1993 to 1995, he was a graduate research assistant with New Mexico State University's Electrical Engineering department, followed by The Ohio State University Electroscience Laboratory, where he was involved in research related to computational electromagnetics. From 1996 to 1997, he worked for Texas Instruments Defense Systems & Electronics group, now part of Raytheon. And from 1997 to 1998, he worked for Ball Aerospace Corporation (Broomfield, CO). Brian joined Ansoft's Boulder, Colorado, office in 1998, focusing on High Frequency Design.

< BACK

RICHARD REMSKI (Boston)

Ansoft Corporation, Application Engineer

TITLE:
Antennas and Scattering: What's New or Different in HFSS v10

ABSTRACT:
This training session will focus on additions to HFSS v10 and enhancements since HFSS v9.2 in the area of Antennas and Scattering. The intent of this session is to provide an overview for several topics, which will include the following: RCS calculation enhancements, automated computation of reflection and transmission for FSS, a new set of 'incident wave sources,' mesh re-use capability, links to HFSS from existing HFSS projects or SIwave projects, improvements in far field calculations, and more. The objective is to provide an introduction to these capabilities so users are better prepared to immediately and effectively apply them in HFSS v10.

BIO:
Richard T. Remski received his BSEE from the Georgia Institute of Technology (Atlanta, GA) in 1988, specializing in microwave and antenna design. Before coming to Ansoft, he worked for various aerospace contractors, performing design and analysis tasks on classified airborne antenna and avionics system applications to support the F-16, A-12, B-2, F-22, and V-22 aircraft programs. In 1997, he joined Ansoft, where his tasks have included technical support, product development assistance, software Q/A, and user training. He has authored articles analyzing Electromagnetic Band Gap (EBG) structures within HFSS and is the creator of the "HFSS Field Calculator Cookbook."

< BACK

LISA MURPHY (San Jose - material not being presented in Boston)
Ansoft Corporation, Application Engineer

TITLE:
Augmenting HFSS Design with Thermal Characterization

ABSTRACT:
This training session will show HFSS users how they can incorporate thermal and stress solutions into their existing EM simulations by using ePhysics. ePhysics augments the electrical analysis capabilities of HFSS with static and transient nonlinear thermal and linear stress analyses. The session will cover high-frequency application areas where thermal effects may be significant. The process begins with an HFSS design at a nominal temperature, then proceeds to ePhysics thermal analysis and optionally to ePhysics stress/deformation analysis. A number of examples and an overview of ePhysics boundary conditions will be presented.

BIO:
Lisa Murphy received her MSEE from the University of Illinois at Chicago. Prior to joining Ansoft, she worked at Amkor Technology as an RF Package Engineer. She joined Ansoft in June 2001 and supports the company's High Frequency tools.

< BACK

JIAN HUANG (San Jose)
Ansoft Corporation, Application Engineer

TITLE:
See Lisa Murphy's Title above.

ABSTRACT:
See Lisa Murphy's Abstract above.

BIO:
Jian received a BS in Radio Engineering from Xi'an Jiaotong University in 1985, an MS and a Ph.D. in Electrical Engineering from the Chongqing University in 1988 and 1992, respectively. Prior to joining Ansoft in 2001, he worked for Wirebenders Inc., a customer magnetic manufacturer, and Marconi Plc, a telecom power supply company. He worked in electromagnetic simulation and application when he was a professor in China and a visiting scholar in Canada. Jian specializes in the research, design, modeling, protection, and application for high-frequency magnetics. He is the author of more than 30 technical publications.

< BACK

JIM DELAP (for Hewlett-Packard)(Boston)
Ansoft Corporation, Application Engineer

TITLE:
On the Use of Tapered Lines for Electrical and Mechanical Reliability in High-end Servers

ABSTRACT:
In high-end servers, the routing density in PCBs is ever so increasing. This has lead to a direct increase in the thickness of such boards. For mechanical considerations, thinner PCBs are preferred. However, in an ideal 50-ohm environment, which is sought for most high-speed signaling approaches, this directly reduces the width of the stripline conductors. This, in turn, increases the overall DC and frequency-dependent conductor losses.

For significant trace lengths (e.g., 20 inches or 50 cm), this can severely reduce the available voltage margin. To satisfy both electrical and mechanical constraints, a tool more common in microwave devices can be used: The taper line. Using tapered traces, narrower lines in a thinner board tailored to 50 ohms can be flared to wider lines of lower impedance. If the transformer is appropriately chosen, the reduction in total insertion loss outweighs the effect of return loss. Hence, from a system perspective, tapered lines could reveal themselves to be a useful tool in high-speed systems.

Here, a feasibility study conducted with the use of HFSS will be presented. The study shows that striplines with 75-100 micron wide lines and 50 ohm characteristic impedance can be flared to double their initial width to produce a much better overall throughput. In addition to discussing in detail our findings, general guidelines will be presented as to the overall applicability of these tapered lines as a function of total line length, bandwidth, and overall system losses.

BIO:
As an Application Engineer, Jim DeLap specializes in High Frequency products, including HFSS and Ansoft Designer. Prior to working at Ansoft, he designed many products, ranging from millimeter-wave mixers and antennas to integrated radios in the 30-60 GHz range. He earned his BSEE from the University of Lowell (Lowell, MA), his MSEE from the University of Virginia (Charlottesville, VA), and has worked at companies such as Millitech, Raytheon, and Agilent Technologies.

< BACK