VHDL-AMS

VHDL-AMS is the IEEE-endorsed standard modeling language (standard 1076.1) created to provide a general-purpose, easily exchangeable and open language for modern analog-mixed-signal designs. Models can be exchanged between all simulation tools that adhere to the VHDL-AMS standard.

Advantages of VHDL-AMS

• Model Exchangeability
    Free exchange of information between VHDL-AMS simulation tools
• Multi-level Modeling
    Different levels of abstraction of model behavior
• Multi-domain Modeling
    Offers solutions in different design domains
• Mixed-signal Modeling
    Supports analog, digital, and mixed signal modeling
• Multiple Modeling styles
    Behavioral, Dataflow, Structural modeling methods

Why use Simplorer for VHDL-AMS?

• Adheres to the VHDL-AMS standard
• Simplorer offers VHDL-AMS and Circuit, Block Diagram, State Machine modeling techniques
• Wizard technology greatly reduces the learning curve
• Easy to use Graphical User Interface
• Offers many standard and optional model libraries
• Co-simulates with specialized simulation packages and proprietary code
• Links to Maxwell for high-fidelity modeling of electromechanical components

VHDL-AMS Models in Simplorer

Open-source VHDL-AMS libraries

• Components provide basic functionality in VHDL-AMS according to the IEEE 1076.1.VHDL Analog and Mixed-Signal Extensions
• Standard VHDL-AMS basic components on the "AMS" tab in the folders circuit, blocks, measurement, tools and physical domains with the most common basic functionality of circuit components and blocks
• VHDL-AMS digital components on the "Digital" tab in the folders digital sources, counters, flip-flops, latches, logic blocks, and logic gates with common basic functionality used for simple digital circuits.
• All available VHDL-AMS components are open source and can be used to derive more advanced models

More information on the IEEE standard VHDL-AMS