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Design Automation for EDA Layout
Featured Capabilities
- Provides seamless interoperability between Ansoft and the following third-party products and format.
- Cadence®
- Allegro® PCB, SiP Digital/RF, Allegro® APD, Virtuoso®
- Mentor Graphics®
- Board Station®, Expedition, PADS Layout
- Zuken
- Sigrity
- Generates ready-to-solve projects for HFSS , SIwave, Q3D Extractor®, Ansoft Designer®, and TPA
- Unites touching metal into single conductor (including traces on multiple layers)
- Generates 3D solid models of selected traces, supply planes and vias
- Edit stack-up properties, such as individual layer thickness, dielectric constant and conductivity
- Select nets for translation by net name(s), or point and click on specific traces or region of the board" Automatic de-featuring of selected nets to minimize model complexity and solution time
IC Layout Specific
- Exports specific "cells" (and their sub-cells)
- Merge via arrays into a single object to simplify the solid model and speed analysis
Packaging Layout Specific
- Generates 3D solid models for wire bonds, solder bumps, solder balls and irregularly shaped ground fill
- Automatically adds ports (HFSS) or sinks and sources (Q3D Extractor) to wire bonds and solder balls
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