The Simplorer® VHDL-AMS Tutorial describes the special functionality for modeling elements in VHDL-AMS within the Simplorer environment. This includes an introduction to the use of VHDL-AMS components as well as general model development in Simplorer.
The simulation models used in the examples in the tutorial are included on the CD that accompanies Simplorer SV, the free, full-featured version of Ansoft's commercially distributed Simplorer. These examples can be loaded into Simplorer from the included files or can be created by following the step-by-step instructions in the tutorial.
Note: The tutorial does not teach engineering design or cover the complete VHDL-AMS language syntax. These topics are large enough by themselves to warrant several books.
